1. Field of the Invention
The present invention generally relates to methods and systems for generating an inspection process for a wafer. Certain embodiments relate to determining a sensitivity of an inspection process based on local attributes determined for different locations within a design for a wafer.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Fabricating semiconductor devices such as logic and memory devices typically includes processing a substrate such as a semiconductor wafer using a large number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a single semiconductor wafer and then separated into individual semiconductor devices.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers. Inspection processes have always been an important part of fabricating semiconductor devices such as integrated circuits. However, as the dimensions of semiconductor devices decrease, inspection processes become even more important to the successful manufacture of acceptable semiconductor devices. For instance, as the dimensions of semiconductor devices decrease, detection of defects of decreasing size has become necessary since even relatively small defects may cause unwanted aberrations in the semiconductor devices. Accordingly, much work in the inspection field has been devoted to designing inspection systems that can detect defects having sizes that were previously negligible.
Most types of inspection systems have adjustable sensitivity (or defect detection) parameters such that different parameters can be used to detect different defects or avoid sources of unwanted (nuisance) events. Although adjustable sensitivity parameters present significant advantages to a semiconductor device manufacturer, inspection systems are essentially useless if inappropriate sensitivity parameters are used for an inspection process. Although using appropriate sensitivity parameters can have a dramatic effect on the results of inspection, it is conceivable that many inspection processes are currently being performed with incorrect or non-optimized sensitivity parameters. In addition, it may be advantageous to use different sensitivity parameters to detect defects in different portions of the wafer (e.g., based on information about the device being formed on the wafer or information about the characteristics of the light from the wafer). However, many methods and systems for determining different sensitivity parameters for different portions of a wafer are disadvantageous. For example, the patterned features being printed on wafers are becoming more difficult to image by currently used inspection systems. Therefore, it is difficult to use information about the device being formed on the wafer obtained by scanning the wafer to change the sensitivity depending on the portion of the device in which the defects are being detected.
Accordingly, it would be advantageous to develop methods and systems for generating an inspection process for a wafer that includes determining a sensitivity for reporting defects detected on the wafer based on local attributes determined for different locations within a design for the wafer that do not have one or more of the disadvantages of currently used systems and methods.